Workshop on On-And Off-Chip Interconnection Networks for Multicore Systems.

Stanford University, Stanford CA

Investigators

Abstract

This is a workshop proposal designed to identify much needed research directions on computer architectures, computing systems and systems software for the emerging multicore and system-on-a-chip (SoC) era in the specific area of on-chip and off-chip communication architecture (i.e., interconnection networks). Areas to be covered by the workshop include applications driving the need for multicores, to hardware/system software technologies and architectures supporting them, to technologies enabling them. Particular focus will be given to on-chip and off-chip interconnection networks, which are a critical architectural components of multicore systems and multiprocessor systems built from multicores.