CSR-EHS: Enhancing the Effectiveness of Utilizing an Instruction Register File

Florida State University, Tallahassee FL

Investigators

Abstract

Embedded applications have to meet different and often conflicting constraints involving energy consumption, space, and time. While a compiler optimization and/or an architectural feature may be developed to improve one aspect of an embedded application, it often comes at the detriment of another. An instruction register file (IRF) can help to achieve these goals. Frequently used instructions are placed in the IRF, and multiple IRF instructions can be referenced by a single packed instruction in ROM or a level-one (L1) instruction cache. This approach enables multiple instructions to be referenced in a single instruction fetched from the memory system and results in multiple instances of the same instruction in the executable being replaced with a smaller IRF index. This research investigates a variety of techniques to enhance the effectiveness of utilizing an IRF. By increasing the number of instructions referenced from the IRF, it is possible to further reduce energy consumption and decrease code size. The project is implementing a number of compilation and architectural techniques to address previous limitations on the number of instructions being packed in an application. The research also explores how an IRF can complement other compiler optimizations and/or architectural features that save energy and reduce code size. Finally, the research pursues experimentation with different instruction sets, over instructions referenced from the memory system and the IRF, to identify approaches that provide greater flexibility and overall efficiency.