CAREER: Parallel, Scalable, and Efficient I/O for Network Servers

William Marsh Rice University, Houston TX

Investigators

Abstract

Networking has become an integral part of modern computer systems, so the architecture of the network subsystem is a critical design consideration. In the past, the performance of the network subsystem has kept up with network bandwidth growth because of the exponential rate of improvement in processor performance. However, to counteract the increasing complexity and wire-limited nature of modern uniprocessors, chip multiprocessing and simultaneous multithreading have emerged as dominant microprocessor architectures. These architectures sacrifice uniprocessor performance growth in favor of increased parallelism, so current network subsystems that rely on single-thread performance will be unable to saturate the network in future systems. This project will develop new network subsystem architectures to efficiently utilize next generation microprocessors and maximize network performance. This research will improve networking parallelism and scalability by considering all levels of the network subsystem, including the operating system's network stack, network device drivers, the I/O system, and network interface hardware. This will result in a restructuring of the hardware and software interfaces within the network subsystem to provide mechanisms for parallel communication and collaborative processing between microprocessors and network interfaces. This project will also be used to expose students to system-level networking issues in both undergraduate and graduate computer systems and architecture courses.