SGER: A VLIW/Superscalar Heterogeneous Multi-core Architecture and the Compiler Support

Southern Illinois University At Carbondale, Carbondale IL

Investigators

Abstract

Intellectual Merit This research will help to address the challenging and pressing issue of designing compiler-friendly multi-core architectures and developing effective compiler support for automatically parallelizing single-threaded programs to fully utilize the potential of multi-core processors. This research will also increase our understanding of the interactions between VLIW core(s) and superscalar core(s) on a single chip for collaboratively exploiting multi-grained parallelisms with different behaviors. The developed simulator/compiler framework will also be made publicly available, which can facilitate a number of stimulating follow-on researches, such as energy efficiency evaluation of the hybrid multi-core, or studying the integration of the hybrid compiler and O.S in multi-programming environments, etc. Broader Impact The success of this project will open the door to a number of possible follow-on research projects to create practical hybrid multi-core processors and the related software systems, which will smoothen and accelerate the transition to the multicore processor-based systems and thus greatly benefit the microprocessor industry, as the single-thread performance can be continuously improved without fundamentally changing the programming paradigm. The proposed hybrid multi-core architecture can also be potentially customized for a great variety of embedded applications that demand both high performance and energy efficiency. Moreover, since future high-performance computing systems are very likely to utilize the multi-core processors as the basic nodes, the transparent single-thread performance enhancement achieved by this project will also help to advance the power of computing into the next generation for meeting the toughest computational challenges. Additionally, this project will attract and train graduate students in multi-core architecture and advanced compiler design, and the research results will also be incorporated into the graduate level computer architecture course, i.e., ECE 532, to better prepare the students for this rapidly developing field.