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Integrating Asynchronous Digital Design and Testing into the Undergraduate Computer Engineering Curriculum

$94,789FY2006EDUNSF

Missouri University Of Science And Technology, Rolla MO

Investigators

Abstract

Engineering - Computer (32) This project is improving educational practices and student learning through development of materials that provide for easy integration of asynchronous concepts into existing digital systems course structures. Since demands to increase circuit robustness, decrease power consumption, and alleviate many clock-related issues are starting to cause a shift from synchronous to asynchronous design styles, introducing this material into the computer engineering curriculum is becoming extremely important. The project is developing lecture notes, example problems, group projects, VHDL libraries of fundamental asynchronous components, and various models of fundamental asynchronous components. It is integrating these materials into two undergraduate/graduate-level courses: one on digital system modeling with VHDL and one on VLSI design. The results of this project are being disseminated through appropriate conference presentations and journal publications and the material is available on the web and on a CD-ROM and this availability is being advertised through a microelectronic systems newsletter. Specially designed non-credit tests and quizzes matched to the learning objectives are being used to evaluate student learning, and standard institutional questionnaires are being used to characterize the students' attitudes about the material. A colleague at another institution is conducting a formal review of the material as an external content expert. The broader impacts of the project are resulting from the dissemination of the materials through various publications and postings.

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