CAD Tools for Double-Gate FETS

Tufts University, Medford MA

Investigators

Abstract

ABSTRACT 0429921 Hassoun, Soha Tufts University The scaling of CMOS technologies has delivered astronomical increases in transistor density and performance, leading to more chip functionality at higher speeds. Several problems are expected to plague nanometer designs: robustness to process and operating variations; long-term reliability due to electromigration and soft errors; and power density, with static power density approaching or exceeding the dynamic one. Novel solutions spanning materials, devices, circuits, microarchitectures and Computer-Aided Design (CAD) tools are required to overcome these problems. We focus in this proposal on CAD tools for double-gate devices, novel transistor structures with more than one gate terminal to control the transistor channel. Compared to MOSFETs, double-gate devices promise substantial improved control over leakage current and short channel effects while delivering high drive currents.