CAD for VLSI Manufacturability and Reliability

University Of Illinois At Urbana-Champaign, Urbana IL

Investigators

Abstract

In this research, we propose computer-aided design (CAD) techniques that consider manufacturability and reliability of very large scaled integrated circuits (VLSI), First, we consider optical lithography which is the enabling technology for the fabrication of today's VLSI. Since feature sizes have become much smaller than the wave length of the light sources used to print them, post-design resolution enhancement techniques (RETs) such as optical proximity correction (OPC) and phase shifting mask (PSM) are used to improve their printability. Ideally, these RETs should be considered during the design steps (e.g., physical design). We propose to develop OPC/PSM-aware CAD techniques. Second, we consider next generation lithography (NGL) techniques which will potentially replace optical lithography in the future. The two leading NGL candidates are electron projection lithography (EPL) and extreme ultra-violet (EUV) lithography. Due to the structure of the membrane mask for EPL, a design needs to be partitioned and later needs to be "stitched" together. We propose to study this mask layout partitioning problem. As for EUV lithography, a major problem is caused by the absorption and scattering of EUV lights by the mask (i.e., the "flare" problem). We propose CAD techniques for solving the "flare" problem. Finally, we consider the antenna problem which is a phenomenon of plasma induced gate oxide degradation. We plan to continue our ongoing research on diode insertion/routing for fixing antenna problems.