A Dynamic Reconfigurable Processing Fabric

Case Western Reserve University, Cleveland OH

Investigators

Abstract

Papachristou A Dynamic Reconfigurable Processing Fabric Abstract This project deals with design methods and tools for a new dynamic reconfigurable hardware fabric that can be embedded in a System-on-Chip (SoC) platform. The objective is to address needs and requirements for adaptable SoCs in high performance on-board processing and communications. SoC technology is well suited for many new compute-intensive applications such as multimedia, visualization, signal and image processing, wireless communications and networking. In more sensitive environments such as networking, satellites and airborne vehicles, SoCs will need to function in multiple roles and moreover need to be dynamically reconfigured in response to environment changes. Reconfigurable computing and reconfigurable hardware will be a key enabler technology to achieve these objectives. Our approach employs an architecture with two key hardware and software layers: the reconfigurable fabric and the manager configuration kernel. We provide a pervasive dynamic configuration scheme based on the coordination and interaction of the hardware and software layers. Our proposed reconfigurable system has significant advantages over FPGA-based systems and other reconfigurable architectures in terms of flexibility, word length scalability, cost, and compatibility with SoC technology. Our work will involve 1) analysis, simulation and design of the hardware fabric using commercial CAD tools; 2) design and development of the software configuration kernel; 3) a prototype test bed of the reconfigurable system and emulation on advanced FPGA platforms.