GGrantIndex
← Search

MRI: Acquisition Of a TLP Testing Cluster for Advanced ULSI On-Chip ESD Protection Research Down to Nanoscale and Advanced RF/Mixed Signal ICs

$178,000FY2003ENGNSF

Illinois Institute Of Technology, Chicago IL

Investigators

Abstract

The PI requests NSF-MRI funds to acquire and establish a TLP (transmission-line-pulsing) Testing System Cluster for research on on-chip ESD (electrostatic discharge) protection for ULSI ICs down to nano-scale and advanced RF/mixed-signal ICs. Institutional cost sharing is 43%. Intellectual Merits: ESD failure becomes a major integrated circuit (IC) reliability problem as semiconductor technologies move into the very-deep-sub-micron (VDSM) ULSI (ultra large- scale integration) regime. On-chip ESD protection circuitry is required to protect IC chips against ESD damage. Currently, trial-and-error approaches still dominate in ESD protection circuit design practice. I will help the PI in his current research as well as the PI's group is pursuing active research on advanced RF/mixed-signal ICs for wireless and information processing applications under different sponsorship, including multi-mode/band universal digital RF systems-on-a-chip (SoC) and high-performance low-power analog-to-digital conversion (ADC) ICs. A TLP Testing System Cluster, consisting of Model 4002 Dynamic TLP Tester and precision heat/cold 8la wafer probe, spectrum/network analyzers, semiconductor parametric analyzer, low-noise super-GHz RF probe station and noise analyzer, plays a critical role to the success of these research activities, because it allows accurate static/transient non-destructive characterizing ESD protection devices and RF/mixed-signal ICs in super-GHz spectrum and ultra-fast sub-1ns time domain, which is particularly critical to sub-100nm/nano-scale/super-RF ESD protection. Broader Impacts: This TLP Testing System Cluster will significantly enhance the research and teaching infrastructure at IIT that enables integrating research and education via performing advanced ESD protection, RF and mixed-signal IC & SoC research at IIT. Several new courses and laboratories will be developed using this instrumentation. Integrating diversity into research and teaching at IIT using this Cluster is proposed. The facility, the only one of the kind in the Midwest region, will be open to inter-disciplinary research activities and external users to promote cross-disciplinary and university-industry collaboration on ESD protection, RF/mixed- signal ICs and other broader microelectronics research.

View original record on NSF Award Search →