High-Performance 1300-1600 nanometer InP-Based VCSELs

University Of California-Santa Barbara, Santa Barbara CA

Investigators

Abstract

0245426 Coldren The intent of this program is to demonstrate the highest performance 1550 nm VCSELs ever, using a very robust, manufacturable, InP-based technology. It is also intended to demonstrate WDM array technology using this approach as well as operability in the range between 1300 and 1550 nm. This technology is based on a recently patented VCSEL design philosophy[1] that has already demonstrated record-level performance using high-index-contrast As-Sb DBR mirrors together with InP conductive layers for low resistance electrical contacts and heat extraction, all lattice-matched and grown in a single epitaxial step on an InP substrate[2-4]. However, in this program it is proposed to incorporate several new and novel concepts that promise significant performance breakthroughs on top of the prior milestones. These concepts include the incorporation of novel 1) dielectric apertures for low-loss lateral optical and current confinement, 2) electron barriers for reduced vertical carrier leakage, and 3) quantum-well intermixing around the circumference of the device for lateral carrier confinement. These elements will lead to significant improvements in output power, maximum operating temperature, wall-plug efficiency, and available wavelength range, as desired for future low-cost optical networks. Prior work funded by NSF and DARPA has been successful in demonstrating the huge promise of the general approach. Most recently, experiments on this InP platform demonstrated the best overall 1550nm VCSEL results[2-4] as compared to all of the various monolithic approaches. These results illustrate the first ever 1550 nm VCSEL to have a sub-milliamp threshold current with over a milliwatt of light out at room temperature. And even with a non-optimal active region design and some excess optical loss in this case, it provided 0.2 mW of output at 70C. Moreover, because several limitations that were present in these early devices are now understood, the proposed improvements have been identified, and preliminary experiments and modeling suggest the 'significant performance breakthroughs' indicated above. The intellectual merit of this work derives from its originality, contribution to knowledge, and experience and infrastructure of the PI. Eleven inventions related to the proposed technology have been filed as patents. The proposed novel VCSEL designs include the use of new dielectric-aperturing techniques for both lateral current and optical confinement, an electron barrier layer for improved high-temperature performance, and optionally, a novel implant and anneal procedure to selectively intermix quantum wells on the periphery for lateral carrier confinement. Previously, new approaches for creating WDM arrays of such VCSELs were proposed[5]; a reproducible MBE growth procedure was developed to create low optical loss, high-index contrast DBR mirrors using compounds of AlGaAsSb lattice-matched to InP; high-conductivity InP layers for low thermal and electrical impedance were included; and very low-voltage-drop tunnel junctions (TJs) incorporating InP and AlGaInAs were developed to enable VCSELs with only n-doped contact layers for low optical loss and electrical resistance[6]. The broader impacts of this activity include its potential for having a major impact on reducing the cost of sources for the optical communications industry. Current long wavelength VCSELs do not provide the required output power, and their temperature range of operation is limited. Higher-power, higher-efficiency, and higher operating temperatures in a low-cost technology for the 1300 - 1550 nm range will be offered by the results of this research, and this will be very enabling to the optical communications industry in its attempts to recover from its current slump. The project will provide an excellent teaching vehicle for the graduate student involved, who will need to learn various aspects of OE device physics, materials growth and processing, and device characterization.