ITR: Collaborative Research: Processor Architectures for Web Switches

University Of California-Riverside, Riverside CA

Investigators

Abstract

This project, which is a collaborative effort between the University of California at Riverside and Los Angeles, focuses on processor and system architecture issues for Web Switches. Web switches are network processing elements that modify network traffic based on content. These devices are frequently used to provide load balancing between functionally equivalent servers as well as cryptographic services; in in the future will be used for a host of new applications including active security and multimedia trans-coding. This project will begin by developing a benchmarking framework that can be used to evaluate the performance of Web switches. The research will then use advanced processor simulation tools to study architectural tradeoffs in the face of the benchmark workload. In particular, the researchers will focus on the efficacy of hardware accelerator blocks that have been proposed. Finally, work will be completed to implement the workload and capitalize on acquired knowledge in the context of an existing test bed for network processors.