ITR: Hardware Acceleration of Database Operations

University Of California-Santa Barbara, Santa Barbara CA

Investigators

Abstract

Hardware-based approaches to accelerate CPU intensive operations that arise in the context of non-standard database applications are proposed. Two hardware technologies, namely, off-the-shelf graphics cards and content addressable memories (CAM) that are used in contemporary Network Routers for very fast lookups are identified. The graphics functionality designed primarily for display applications can be exploited for polygon intersection in spatial databases and for distance-based query processing. Content addressable memories (CAM) can be gainfully deployed for accelerating join operations in databases. In the context of new database applications, the join constraint which is generally based on equality is being expanded to encompass other conditions such as set-containment. The major goal of this research is to develop a general framework for enabling fine-grained hardware acceleration within a commercial DBM