Next-Generation Load-Value Predictors

Cornell University, Ithaca NY

Investigators

Abstract

Current high-end microprocessors incorporate a variety of predictors to improve performance. Future CPUs will likely include even more predictors, in particular load-value predictors. Load-value predictors provide predicted values to instructions that need the result of a load, thereby allowing these instructions to proceed without waiting for the load's slow memory access to complete. Thus, the program execution time is reduced. Recent work on load-value prediction proposes sophisticated hybrid predictors with confidence estimators. While these predictors are quite effective, their complexity and size negatively affect performance parameters such as critical-path length, cycle time, chip area, power consumption, and heat dissipation. The goal of this research is to reduce the size of value predictors without decreasing performance, to improve the prediction accuracy and coverage, and to develop new predictors and confidence estimators. A systematic search will find novel predictors that exploit additional value locality and will identify better confidence estimators that reduce costly mispredictions. Moreover, techniques that repair malformed predictions and inhibit wrong predictions will be investigated. Finally, schemes to enhance the predictor utilization and approaches to speed up predictor accesses will be researched. While the proposed ideas are already beneficial in today's systems, they will become even more important as increasing numbers of CPU cycles are wasted due to growing load latencies.