Passivation of Silicon Dangling Bonds by Deuterium Implantation
New Jersey Institute Of Technology, Newark NJ
Investigators
Abstract
This project will obviate the diffusion annealing by introducing deuterium through ion implantation. In MOS transistors, for example, deuterium will be implanted on silicon substrate before the thin gate oxide was grown. To achieve the objective, we will investigate (1) effect of deuterium implantation energy and dose on oxide growth and its interface. An appropriate dose can reduce substrate damage or eliminate creation of dislocation loops while satisfy the dangling bonds even after the subsequent thermal cycles of oxide growth. Thermal budgets will be optimized to control the physical incorporation and subsequent electrical characteristics by studying the distribution of deuterium after ion implantation. (2) Secondly, thermal kinetics of deuterium desorption from the interface will be studied and its effect on electrical characteristics of finished device will be evaluated. (3) Thirdly, the mechanisms of deuterium diffusion in Si/Si02 system due to oxide growth will be investigated. The focus of the proposal is to conduct an experimental investigation of incorporating deuterium effectively through ion implantation. Tasks will be undertaken for a comparative study of this process to other means of interface passivation such as various annealing treatments, deuterium implantation at a partially completed device (TI approach) and hydrogen implantation. In addition, we will incorporate deuterium using ion implantation in silicon nanocrystals used for optoelectronics applications. Even though the main focus of this research will be towards Si/Si02 interface, an additional task will study GaAs devices to investigate behavior of deuterium implantation in optoelectronic devices. Extensive physical and electrical characterization will be employed. Sub-micron MOSFETs will be used to achieve a fundamental understanding of the behavior of implanted deuterium at the ultra-thin silicon-dioxide/silicon interface, which is, at present, poorly understood. Test devices will be processed at the Microfabrication Center at NJIT with the help of graduate and undergraduate students. Since NJIT has a significant presence of minority and women students (~40% and ~18% respectively) it is expected that some of these students will have the opportunity to contribute to this project. A recently acquired state-of-the-art device characterization system (NSF supported) will be used for electrical characterization at NJIT whereas some of the physical characterization will be carried out at Agere Labs formerly Lucent Technologies. GaAs samples will be prepared by Anadigics. Deuterium implantation will be carried out at NJIT and at Ion Implantation Company (IICO). The high national importance of this cutting edge technology and close involvement of qualified staff and students at NJIT and researchers at Agere Labs and Anadigics will significantly impact on advancing knowledge base in this area.
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