Improving System Functionality using Monitoring Processors

University Of California-Davis, Davis CA

Investigators

Abstract

ABSTRACT Proposal #0113418 U of Cal Davis Farrens, Matthew Microprocessors now rival supercomputers in raw processing power, thanks to increases in transistor densities and architectural advances such as the exploitation of parallelism. However, the bandwidth and latency of memory systems is so limited that increasing performance in the microprocessor often leads to little overall system improvement. At the same time that this is occurring, software costs are burgeoning. This research explores using some of the increasing silicon real estate to provide extra functionality. The approach is to dedicate a portion of these new transistors to provide programmable monitoring hardware to enhance software development, make debugging more efficient, increase reliability and provide run-time security. Additional applications may be found in monitoring run-time guarantees and invariants for embedded systems. Taking a specific example, this approach can address pointer-related defects occurring in software which render systems unreliable and vulnerable to hackers. A simple, auxiliary co-processor monitors address references from a compute processor via a loose coupling (e.g. via the L1 cache coherence bus). This loose coupling reduces design complexity and avoids the need for any core CPU redesign and allows this approach to be readily added to existing designs. Furthermore, the approach is complementary to static compiler analysis techniques and the research extends conventional analysis to exploit efficient run-time monitoring capabilities.