ITR/AP (MPS): Collaborative Research on Large-Scale Dislocation Dynamics Simulations for Computational Design of Semiconductor Thin Film Systems

University Of California-Los Angeles, Los Angeles CA

Investigators

Abstract

This is a collaborative research award under the Information Technology Research initiative. The collaborator (DMR-0113172) is Professor L. Sun at the University of Iowa. The research involves the development and application of methods for large-scale dislocation dynamics simulations. As a result of recent progress in manufacturing and engineering utilization of nano-and micro-scale structures, there is an urgent need for approaches that are capable of predicting the reliability and propensity of these structures to failure. This grant will develop Fortran 90/95 parallel computer software, based on discrete dislocation dynamics, which will predict plastic deformation and failure of sub-micron semiconductor microelectronics. Developed software will be aimed at (1) design of desired mechanical properties of semiconductor thin film-substrate material systems for optimum reliability; (2) development of new computer architectures for parallel, large-scale simulations for the dynamics of topologically complex line defects, which interact through long-range force fields; and (3) enhanced education training of graduate and undergraduate students. The following projects will be undertaken: (1) Investigation of single and collective dislocation interaction phenomena in anisotropic materials, which determine plasticity and failure in semiconductor devices; (2) Multiscale coupling of parametric dislocation dynamics with the finite element and analytical elasticity methods; (3) Development of unique software on parallel, scalable computer clusters to simulate the collective behavior of topologically complex line defects, which interact with a long-range force field; (4) Application of the developed software to investigate a number of critical physical mechanisms, including, misfit and threading dislocation loop motion; dislocation-dislocation interactions; junction and jog formation; dislocation annihilation and multiplication; dislocation interaction with grain boundaries, free surfaces and bimaterial elastic interfaces; dislocation interactions with point defects, precipitates and cracks; influence of thermal residual stress; computational design of buffer layers and superlattices; and (5) Large-scale simulation and optimization of semiconductor systems to provide guidelines for engineering design of new generations of microelectronics. The research will improve our understanding of plastic flow and failure at the nano-to-meso scale and represents a challenge to high performance computing and protocols. Models will be compared to experimental data and will also be used to design reliable microelectronics. %%% This is a collaborative research award under the Information Technology Research initiative. The collaborator (DMR-0113172) is Professor L. Sun at the University of Iowa. The research involves the development and application of methods for large-scale dislocation dynamics simulations. As a result of recent progress in manufacturing and engineering utilization of nano-and micro-scale structures, there is an urgent need for approaches that are capable of predicting the reliability and propensity of these structures to failure. This grant will develop Fortran 90/95 parallel computer software, based on discrete dislocation dynamics, which will predict plastic deformation and failure of sub-micron semiconductor microelectronics. Developed software will be aimed at (1) design of desired mechanical properties of semiconductor thin film-substrate material systems for optimum reliability; (2) development of new computer architectures for parallel, large-scale simulations for the dynamics of topologically complex line defects, which interact through long-range force fields; and (3) enhanced education training of graduate and undergraduate students. The research will improve our understanding of plastic flow and failure at the nano-to-meso scale and represents a challenge to high performance computing and protocols. Models will be compared to experimental data and will also be used to design reliable microelectronics. ***