MRI: Acquisition of RF/Mixed Signal Test Equipment for Ultra-High Frequency System-on-Chip Applications

University Of Washington, Seattle WA

Investigators

Abstract

The primary driver of the information revolution is advanced silicon processing. Consequently, system design is undergoing a fundamental change, moving from multiple chip solutions to system-on-a-chip (SOC) solutions. However, as was noted in the National Science Foundation's recent planning workshops on advanced VLSI systems, the testing and measurement thoery and practice related to these heterogeneous resources integrated into a SoC solution is a major unsolved problem that could greatly limit future advances. The advancements in process technologies provide for radically new types of devices, with commensurate design challenges and test and measurement needs. An example of such a system currently under development at the UW is a human/machine transducer chip-Universal Transducer Chip, a single integrated system capable of providing a speech recognition interface to a ubiquitous wireless network. Such a system is likely to become the standard interface modality for a wide range of new applications, from smart homes and smart test benches to ubiquitous high-performance computing fabrics. However, to achieve this potential, there are multiple test and measurement issues that must be addressed: o Radio frequency transceivers must be tested and characterized in the ISM (2.4GHz) and UNfl (5.6-5.8GHz) frequency bands for a broad range of emerging wireless standards o Low power, high performance wireless hardware implementations must be tested and measurement techniques must be developed and validated for future SoC applications in the LMDS bands at 17GHz, and above o Heterogeneous single-chip integration and test and measurement must be supported, allowing for the fabrication of RF, analog, high performance digital, and re-configurable subsystems within a single piece of silicon The infrastructure contained in this proposal enables an investigation into the future of testing and measuring ultra-high-frequency SoC systems, years in advance of their commercialization. We will seek to develop and demonstrate a test and measurement methodology that can provide the benefits of multiple different resource types for numerous design domains. As an initial driver of these efforts, we will characterize a Human/Machine transducer chip, seeking to guide the development of future system-on-a-chip design and test methodologies. It is generally representative of future SoC systems that will operate at ever higher frequencies with ever-increasing levels of complexity. To support the design of such cutting-edge silicon systems, we will develop innovative techniques to handle numerous test issues: o Validation of techniques for integrating RF and Analog components into future ultra-low-voltage SoC designs. o Validation of high-performance, power efficient digital logic families for supporting these systems. o Integrated testing methodologies for complex, heterogeneous systems that can provide complete system test through an optimum combination of on-chip and off-chip ultra-high-frequency test environments. In addition to the development of new approaches for testing and measuring SoC chip designs, we will also develop innovative techniques for educating future high-frequency SoC designers. By providing an integrated curriculum including high-frequency test and measurement, along with a just-in-time learning environment, we will help create system architects capable of harnessing these radically new design techniques and opportunities.