CAREER: A Comprehensive High-Level Design Validation Approach for Microprocessors

University Of California-Davis, Davis CA

Investigators

Abstract

This research focuses on devising practical methods for high-level design validation of microprocessors and supporting CAD tools based on explicit design error modeling, design error simulation, model-directed test generation, and design error correction. Specifically, the research concentrates on the following issues: (a) the development of a high-level design error simulation method based on a new high-level critical path tracing approach; (b) the establishment of high-level controllability and observability measures that can be used to guide the test generation for design errors; (c) the development of high-level test generation algorithm(s) that generate instructions to detect modeled and actual high-level design errors in microprocessors; (d) the development of high-level design error location, diagnosis, and correction methods that pinpoint the error location and suggest ways to correct it; and (e) the formation of a set of guidelines that facilitate design for validation and post-silicon validation.