CISE Experimental Partnerships: MIT Raw Machine

Massachusetts Institute Of Technology, Cambridge MA

Investigators

Abstract

EIA-0071841 Amarasighe, Saman P. MIT CISE Experimental Partnerships: Partnerships: MIT Raw Machine Rapidly evolving technology places a billion transistors on a chip within reach of the computer architect. Several approaches to utilizing the large amount of silicon resources have been put forth, with the single important goal of obtaining the most performance out of approximately one square inch of silicon. These approaches exploit more parallelism in one or more instruction streams. Examples include more aggressive superscalars, multiscalars, processor-coupled designs, simultaneous multi-threading processors, multiprocessors on a chip and VLIWs. The goal of this project is to discover, implement and evaluate simple architectural mechanisms that scale with increasing VLSI clock speed, and software techniques that orchestrate high-level computations on the low-level architectural resources for maximum efficiency.