ITR: Heterogeneous System Integration in System-on-a-Chip Designs

University Of Washington, Seattle WA

Investigators

Abstract

This project studies the integration of heterogeneous resources into a system-on-chip (SOC) solution. Heterogeneous SOC integration supports the fabrication of RF, analog, high performance digital, and re-configurable subsystems within a single piece of silicon, and includes issues of simulation, design, integration, test, and education. An example SOC is a human/machine transducer chip that provides a speech recognition interface to a ubiquitous wireless network. Such a system represents a standard interface modality. Multiple topics are being researched including low-power speaker identification, speech processing algorithms, and hardware implementations. Low power, high performance wireless protocols are also being developed to support the asymmetric communication loads, sending low bandwidth control messages produced from the recognized speech and receiving high-bandwidth information return for visual, audio, and other feedback to the user.