ITR: High Density Analog Computing Arrays

Georgia Tech Research Corporation, Atlanta GA

Investigators

Abstract

EIA-0083172 Hasler, Paul Georgia Institute of Technology ITR: High Density Analog Computing Arrays This project is investigating an alternate model of real-time sensory signal processing based upon a mixture of analog and digital computation. The arrays under study perform analog computations directly in modified EEPROM memory cells; each cell acts as a multiplier that multiplies the input signal by an analog value stored on a floating gate. Potential advantages of analog computing arrays include lower latency than digital computers, lower power consumption, and parallel processing of many analog inputs. The project encompasses experimental demonstration of analog computing arrays, simulation and design tools to make the technology accessable to DSP designers, and investigation of the robustness and reliability of the technology. Several single-chip signal processing systems will be developed, including adaptive matched filters, a cepstrum calculater, systems for hidden Markov models, and a multi-directional filter array.