Understanding and Improving Memory System Performance via a New Approach to Cache Analysis and Access Ordering

University Of Utah, Salt Lake City UT

Investigators

Abstract

ABSTRACT Title: Understanding and Improving Memory System Performance via a New Approach to Cache Analysis and Access ordering PI: Sally McKee, University of Utah Microprocessor speed is increasing much faster than memory system speed: both speed-growth curves are exponential, but they represent diverging exponentials. This proposed research strives to develop a comprehensive approach to bridging the processor/memory performance gap by developing better measures of performance, better tools for observing memory system behavior and understanding memory usage patterns, and combined compiler and architectural schemes to exploit these patterns. The first component of this research investigates methods and tools by which to better measure and interpret complex system behavior in the cache and memory hierarchy. The PI and others are developing a new framework for the analysis of caching systems; this new "caches as filters" framework focuses on properties of a memory trace rather than artifacts of a particular memory organization. This research will support the development of the tools and technology necessary to apply the new framework to real problems and systems. The second component of this research investigates combined compiler and architectural approaches to improving memory system performance in modern microprocessors via smarter scheduling of memory activity and hardware support for streaming.