Career: Prediction and Speculation in High-Performance Memory Systems

Purdue Research Foundation, West Lafayette IN

Investigators

Abstract

Technological advancements in semiconductor fabrication and innovations in processor microarchitecture have led to an ever-increasing processor-memory performance gap. While cache memory hierarchies have conventionally helped reduce the gap, the brute-force approach to build deeper hierarchies is resulting in prohibitively long latencies when accessing lower levels. This proposal's research component advocates using prediction and speculation in the memory system to reduce memory latencies. The research contribution is a novel memory system design, Proactive Memory, in which the system "proactively" moves and places data among the cache hierarchy levels in anticipation of a processor access. The key mechanisms enabling proactive memory are predictors that monitor and capture processor memory access patterns and accurately predict subsequent accesses. Rapid technological improvements are resulting in an ever-increasing complexity in computer systems. The educational activities seek to prepare the students with the necessary skills to overcome the challenges a computer architect faces in light of these rapid technological improvements. Specifically, the educational component seeks to enhance computer architecture education by teaching students about the foundations of multiprocessor architectures, familiarizing them with performance evaluation tools for computer system design, providing them with easy-to-use software simulation environments, and strengthening their communication skills and ability to present technical work.