CAREER: Scalable Reconfigurable Computing

Carnegie Mellon University, Pittsburgh PA

Investigators

Abstract

The growing use of both microprocessors and FPGAs to implement digital systems illustrates the trend towards programmable, commodity hardware and product differentiation through software. Unfortunately, FPGAs lack the abstract model that makes software design practical, and microprocessor architectures lack spatial relationships between operators that are essential to performance in interconnect-dominated technology. This project is developing abstractions that hardware designers can use to make their designs portable and scalable into deep-submicron processes. In addition, this project is exploring how these abstractions can be leveraged within a standard processor architecture to exploit the massive parallelism of media-centric computing. The goals of this project are to: (1) develop hardware virtualization techniques that apply to a broader class of applications than the strict hardware pipelines supported by PipeRench, (2) improve the scalability of these programmable architectures by localizing interconnect without sacrificing "compile-ability" or performance, and to (3) understand how these techniques can be leveraged within the context of a standard microprocessor.