Metallurgical Reliability Issues in Flip Chip Technology

University Of California-Los Angeles, Los Angeles CA

Investigators

Abstract

9987484 Tu This research is a systematic, basic study of the reliability of solder joints undergoing a combination of mechanical, chemical and electrical forces. The project examines one of the most challenging reliability issues in electronic packaging technology. Electromigration is measured in SnPb and Pb-free solders from room temperature to 150C. The effect of electromigration on interfacial reactions is determined at the solder joint interfaces. Also studied is the effect of stress on electromigration. The combined effects are examined on the durability of a flip chip solder joint. On the basis of these studies, insight should be developed that will enable useful solutions to enhancing solder joint reliability. %%% In consumer electronic goods as well as in microprocessors, the current trend is to attach the silicon chip directly to an organic substrate. Smart card is a good example. It is called direct chip attachment or flip chip technology in which an area array of solder bumps is used to join the chip to the substrate. This is a low cost process, which offers the large number of electrical leads (over a few thousands) required for packaging a high performance chip. However, the very large difference in coefficients of thermal expansion between the chip and the organic substrate results in thermal stresses that can create a serious reliability issue. Owing to the organic nature of the substrate, the use of a low melting point solder such as eutectic SnPb or eutectic SnAg (Pb-free) alloy is needed. These high-Sn solders react extremely fast with the under-bump thin film metallization on the chip surface, resulting in mechanically very weak joints. Furthermore, for future ULSI chips, the size of the solder bump could approach 50 microns. Then electromigration becomes a concern since the solder has a fast atomic diffusivity near ambient temperature. ***