High Performance Analog-to-Digital Interfaces in CMOS Technologies

University Of California-Davis, Davis CA

Investigators

Abstract

Many signal-processing systems operate at least partly in the digital domain on signals that originate in analog form. In implementing the required digital-signal-processing (DSP) circuits for such systems, CMOS technologies have become dominant because of their high densities and low power dissipations. To reduce system cost and increases portability, both increased levels of integration and reduced power dissipations are required, forcing the associated analog interface circuits to use CMOS compatible technologies. When implemented in CMOS technologies, however, such interface circuitry often limits the performance of the overall signal-processing systems. Therefore, the theme of this research is to study techniques that can overcome the accuracy and speed limitations in CMOS analog interface circuits. In particular, this research will focus on techniques to overcome the mismatches in high-speed, parallel, time-interleaved analog-to-digital converters and to improve linearity of analog-to-digital converters. Specific objectives of the proposed research are: 1. to develop background-calibration techniques that can overcome the accuracy, linearity and/or conversion-rate limitations of analog interface circuits and 2. to demonstrate these techniques by fabricating prototypes.